It's the mobile version, not the desktop version. Rumor has it that Medusa Point, based on the Zen 6 architecture, will feature a new FP10 socket measuring 25mm x 42.5mm, approximately 6% larger than the FP8 socket used in the current Strix Point processor. This modification, which recently came to light in the NBD shipping manifest, indicates that Medusa Point will be significantly different in design from its predecessor.

Medusa Point takes a bold step in chip design compared to the Zen 5-based Strix Point, which utilizes a monolithic design that integrates four high-performance Zen 5 cores with eight high-efficiency Zen 5c cores on a 232.5 square millimeter chip, with all components sharing the same silicon. In contrast, Medusa Point transitions to a chiplet architecture that includes a dedicated Core Compute Die (CCD) carrying 12 Zen 6 cores with separate I/O chips. This modular design is anticipated to enhance performance and flexibility while optimizing power efficiency.

Process upgrades are another highlight of Medusa Point. It will employ TSMC's advanced 3nm process, a step up from Strix Point's 4nm node. The reduction to 3nm not only decreases transistor size but also enhances power efficiency and compute density, offering greater performance potential for the Zen 6 cores. The Zen 6 architecture could bring significant IPC (instructions per cycle) increases, and while specific figures have yet to be released, the industry generally expects it to outperform Zen 5 in both multi-threaded tasks and single-core performance.

Medusa Point has made a surprising choice concerning its integrated graphics (iGPU). Latest information indicates it will not adopt the RDNA 4 architecture; instead, it will continue with RDNA 3.5. This aligns with AMD's GPUOpen driver code update, which suggests that RDNA 4 will focus on the discrete graphics market, while mobile APUs will persist with RDNA 3.5 for now. RDNA 3.5 has already proven its worth in products like Strix Point, specifically in Strix Halo, where its up to 40 compute units are comparable to NVIDIA RTX 4070 laptop graphics cards. Although iGPU specifications for Medusa Point have not yet been fully disclosed, rumors suggest its graphics performance could be up to a 50% increase over Strix Point, further strengthening AMD's competitiveness in the integrated graphics space. While future mobile processors might lean towards the more advanced RDNA architecture, the upcoming Medusa Point seems poised to continue with RDNA 3.5.

The socket upgrade also brings physical changes. The increased size of the FP10 socket could imply either an overall size increase of the chip or the need to accommodate additional I/O bandwidth and power requirements. Comparatively, the FP8 socket measures 25mm x 40mm, encompassing an area of about 200 square millimeters. This change could be related to the necessity for a chiplet design that ensures efficient communication between multi-chip modules. Furthermore, the adoption of the FP10 socket means motherboard manufacturers will need to update their designs, presenting certain hardware compatibility considerations for user upgrades.

As for release timing, no specific date has been provided for Medusa Point, but industry insiders speculate it could debut in 2026, aligning with AMD's Zen architecture iteration cycle. Before then, AMD is expected to release more Zen 5 derivatives, such as a high-end version of the Strix Halo, in 2025. Development of Medusa Point appears to be accelerating, with sources suggesting the design will reach tape-out (finalization) in Q2 2025, entering mass production by the end of the year or in early 2026.

It's important to note that Medusa Point is not the only member of the Zen 6 family. The desktop "Medusa Ridge" will continue to support AM5 sockets, offering an upgrade path for DIY enthusiasts. On the other hand, Medusa Point focuses on the mobile market and could become a crucial driver for high-end notebooks. By combining the high-performance cores of Zen 6 and the AI capabilities of the XDNA 2 Neural Processing Unit (NPU), its computing performance is set to surpass the 50 TOPS of the Strix Point, further fulfilling the computing needs of AI-powered PCs.

From a market perspective, the launch of Medusa Point will intensify the competition between AMD and Intel. Intel plans to introduce Panther Lake processors in 2025, with Xe3 graphics cards challenging AMD's APU lineup. With its 3nm process and chiplet design, Medusa Point may leverage performance and energy efficiency advantages. However, AMD's decision to persist with RDNA 3.5 has sparked discussions—it remains to be seen whether this choice will limit its potential in the gaming notebook market amidst rapidly evolving graphics technology.

Medusa Point highlights AMD's latest advancements in mobile processor technology. From the FP10 socket to the 3nm process and the chiplet architecture with RDNA 3.5 graphics, this product builds on existing technological advantages while paving the way for the future of Zen 6. As more details gradually emerge, tech enthusiasts have reason to anticipate improvements in performance, power efficiency, and graphics capabilities.