Intel was the guest of honor at the Barclays 22nd Annual Global Technology Conference, where the company's two interim co-CEOs, Michelle Johnston Holthaus and David Zinsner, provided an update on the company's current status. They discussed Intel's forthcoming "Panther Lake" processor, set to succeed the Intel Core Ultra 200S Arrow Lake processor.
The co-CEOs confirmed that Panther Lake will be utilizing Intel's 18A technology nodes, and they have already supplied some customers with E0 engineering samples. According to interim co-CEO Michelle Johnston Holthaus, "We are now working with our own fabrication plants to develop Panther Lake, our product slated for 2025, which will utilize the Intel 18A process. It's the first time in a while that we are the lead client for an Intel process. To ensure reliability, we've distributed ES0 samples of Panther Lake to our clients, with eight samples successfully powered up. This demonstrates that the silicon wafer quality is exceptional and the fabrication facilities are performing well."
Although we are not privy to the exact definition of ES0 within Intel, it likely refers to one of the earliest engineering sample phases on the Intel 18A process. Generally, ES denotes engineering samples, and the '0' could indicate the initial design iteration.
Previous reports have suggested that Panther Lake-H will feature six P-Cores, eight E-Cores, and four LP E-Cores, indicating a redesign of the low-power island in the SoC module. The P-Core will adopt the Cougar Cove architecture, boasting greater IPC than the current Lion Cove, while the E-Core will continue employing the Skymont design. It is expected that the SoC modules will transition from TSMC N6 to a more advanced process to support the new LP E-Core and NPUs. The cores are rumored to be based on the Xe3 Celestial architecture. However, Panther Lake-H is not scheduled to debut until early 2026, following the release of Arrow Lake-H in early 2025. Regarding the desktop variant, Panther Lake-S, there is no confirmation of its development status.
