Yesterday, a netizen leaked the PCB of the GeForce RTX 5090. The GPU chip area is notably large, and the memory configuration is arranged in a '5452' pattern, comprising 16 GDDR7 memory modules. These modules theoretically allow for memory capacities of 32GB, 48GB, or 64GB. The absence of an NVIDIA logo on the PCB suggests it is not a Founders Edition design but likely from a partner manufacturer.

As reported by Techpowerup, the first physical images of the GB202 chip—the largest gaming GPU built on the Blackwell architecture—have surfaced online, essentially confirming the PCB layout that was leaked earlier. The chip's ASIC code is labeled as 'GB202-300-A1,' implying that the GeForce RTX 5090 may not have all its CUDA cores enabled. Typically, NVIDIA uses the '450' suffix when all CUDA cores are fully operational.

The image also reveals the GDDR7 memory modules surrounding the GB202 chip. These details, along with the chip's package size and pin count, verify that the GeForce RTX 5090 features a 512-bit memory bus width and a 32GB memory capacity. This setup results in a memory bandwidth of 1,792 GB/s, thanks to the GDDR7's data rate of 28 Gbps. Additionally, the card utilizes a 24-phase power supply with a single 16-pin 12V-2x6 connector, and power consumption is expected to range between 500W and 550W.

Jensen Huang, NVIDIA's Founder and CEO, is scheduled to deliver a keynote on the eve of CES 2025. The presentation will take place at 18:30 Pacific Time on January 6, 2025 (10:30 GMT on January 7, 2025), where he will introduce the next generation of GeForce RTX 50 Series gaming graphics cards based on the Blackwell architecture.